Interphase Tech 4538 Instrukcja Użytkownika Strona 9
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Contents
4538 Hardware Reference Manual iii
CPM RCCR Reset
CHAPTER 3 Programming the Peripherals
Overview
PowerQUICC II CPM Initialization
Serial Interfaces and Time Slot Assigner Initialization
TDM Busses in Multiplexed Direct Mode and in Switched Mode
TDM Busses in Independent Direct Mode
TDM Busses in Pass-Through Mode
Clocks and Baud-Rate Generators
Introduction
BRGCLK
BRG7 – TTY Baud-Rate Generator
MCC Initialization
T1/E1/J1 Framer Initialization
Introduction
Master Clock Initialization
TDM Busses General Structure
Multiplexed Direct Mode
Independent Direct Mode
Switched Mode
Pass-Through Mode
Framing and Line Coding Initialization
Common Initialization
T1 Specific Initialization
E1/E1-CRC4 Common Initialization
E1 Non-CRC4 Specific Initialization
E1-CRC4 Specific Initialization
Clock Synchronization Initialization
Transmit Pulse Shape
Line LED Control
The Ethernet Port Initialization
The TTY Framer Initialization
CHAPTER 4 Accessing the 4538 on the PCI Side
PowerSpan Configuration by the PCI Host
PCI Configuration
Interrupt Pin Configuration
PCI-to-Local Window Configuration
Controlling the 4538 Hardware and Software Resets
Controlling the PCI-to-Local Interrupt
Local to PCI Interrupt (–INTA)
Local Space Access From PCI Memory Space
Access to the FLASH EEPROM Through PCI
FLASH EEPROM Programming Algorithms
Serial EEPROM Connected to the PowerSpan
- 4538 PMC 1
- T1/E1/J1 1
- Communications Controller 1
- Hardware Reference Manual 1
- Copyright Notice 3
- Disclaimer 3
- Trademark Acknowledgments 3
- Assistance 4
- END-USER LICENSE AGREEMENT 5
- Contents 10
- Interphase Corporation 10
- List of Figures 11
- List of Tables 13
- List of Examples 15
- Using This Guide 17
- Type Definition 18
- Code Examples 18
- Icon Conventions 18
- Text Conventions 19
- Interphase WWW/FTP Site 20
- 1Hardware Description 23
- The PowerQUICC II 24
- PowerQUICC II Resets 25
- System Clocks 26
- PCI Local Space Mapping 26
- 6 Interphase Corporation 28
- Interrupts 29
- Memory Controllers 29
- 7DEOHCPM Port A Usage 30
- 7DEOHCPM Port B Usage 30
- 7DEOHCPM Port C Usage 31
- CPM TDM Busses 32
- Bank of Clocks 33
- Baud Rate Generator 33
- Ethernet 10/100BaseT 33
- TTY Console Serial Port 34
- User-Programmable LEDs 34
- The PCI Bridge 35
- Description 36
- Register Description 37
- PCI to Local Interrupt (ATN) 42
- 3&,0HPRU\6SDFH 45
- /RFDO0HPRU\6SDFH 45
- 3&,,26SDFH 48
- Board Equipment Register 49
- The FLASH EEPROM Boot Memory 51
- The QuadFALC T1/E1/J1 Framer 52
- Register Value 53
- XPM0 XPM1 XPM2 XPM0 XPM1 XPM2 53
- The Ethernet Transceiver 55
- TDM Bus Configurations 56
- 36 Interphase Corporation 58
- Multiplex Direct Mode 60
- 40 Interphase Corporation 62
- 44 Interphase Corporation 66
- 46 Interphase Corporation 68
- 50 Interphase Corporation 72
- 54 Interphase Corporation 76
- 56 Interphase Corporation 78
- 58 Interphase Corporation 80
- 24538 Power-Up Initialization 81
- 60 Interphase Corporation 82
- Initialization 82
- Value Description 82
- [±[) [ 5HVHUYHG 83
- 62 Interphase Corporation 84
- PowerQUICC II Initializations 85
- UPM Controller Programming 88
- MMU Initialization 88
- Cache Initialization 88
- I/O Port Initialization 89
- CPM RCCR Reset 89
- 68 Interphase Corporation 90
- 3Programming the Peripherals 91
- 70 Interphase Corporation 92
- Introduction 95
- 74 Interphase Corporation 96
- Master Clock Initialization 97
- TDM Busses General Structure 97
- Multiplexed Direct Mode 98
- Independent Direct Mode 100
- Switched Mode 101
- Pass-Through Mode 102
- Common Initialization 104
- T1 Specific Initialization 104
- Register Bit Value Comment 105
- The TTY Framer Initialization 106
- 86 Interphase Corporation 108
- PCI Configuration 109
- Interrupt Pin Configuration 109
- 88 Interphase Corporation 110
- 90 Interphase Corporation 112
- 92 Interphase Corporation 114
- In Situ EPLD Programming 115
- PCI Deadlock Situations 116
- 5Connectors and Front Panel 117
- -77< 118
- -/LQH 118
- -/LQH 118
- -(WKHUQHW 118
- 7[' 120
- 5[' 120
- Table 5-5. PMC Connector P2 122
- 102 Interphase Corporation 124
- PMC Connector P4 125
- 104 Interphase Corporation 126
- Debug Port J5 127
- ISP Enable Jumper JP1 128
- Blank Card Jumper JP2 128
- Connector Summary 129
- Carrier Card Specification 129
- 108 Interphase Corporation 130
- ROW A ROW B ROW C ROW D ROW E 130
- Custom Carrier Card 131
- 6435 Rear Transition Module 132
- 112 Interphase Corporation 134
- AMechanical Information 135
- 114 Interphase Corporation 136
- Bibliography 137
- Telecommunication Standards 138
- Manufacturers’ Documents 140
- 120 Interphase Corporation 142
- Glossary 143
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